1. Field of the Invention
The present invention relates to access to a Flash memory, and more particularly, to a method for enhancing verification efficiency regarding an error handling mechanism of a controller of a Flash memory, and to an associated memory device and a controller thereof.
2. Description of the Prior Art
As technologies of Flash memories progress in recent years, many kinds of portable memory devices, such as memory cards respectively complying with SD/MMC, CF, MS, and XD standards, are widely implemented in various applications. Therefore, the control of access to Flash memories in these portable memory devices has become an important issue.
Taking NAND Flash memories as an example, they can mainly be divided into two types, i.e. Single Level Cell (SLC) Flash memories and Multiple Level Cell (MLC) Flash memories. Each transistor that is considered a memory cell in SLC Flash memories only has two charge levels that respectively represent a logical value 0 and a logical value 1. In addition, the storage capability of each transistor that is considered a memory cell in MLC Flash memories can be fully utilized. More specifically, the voltage for driving memory cells in the MLC Flash memories is typically higher than that in the SLC Flash memories, and different voltage levels can be applied to the memory cells in the MLC Flash memories in order to record information of two bits (e.g. binary values 00, 01, 11, or 10) or more in a transistor that is considered a memory cell. Theoretically, the storage density of the MLC Flash memories may reach twice the storage density of the SLC Flash memories, which is considered good news for NAND Flash memory manufacturers who encountered a bottleneck of NAND Flash technologies.
As MLC Flash memories are cheaper than SLC Flash memories, and are capable of providing higher capacity than SLC Flash memories while the space is limited, MLC Flash memories have been a main stream for implementation of most portable memory devices on the market. However, various problems of the MLC Flash memories have arisen due to their unstable characteristics. In order to ensure that the access control of a portable memory device over the Flash memory therein can comply with related standards, the controller of the Flash memory should have an error handling mechanism such as a software error handling mechanism in order to properly handle various errors that occur in different situations.
According to the related art, when verification of the error handling mechanism mentioned above is required, a burn-in test for verifying the error handling mechanism typically becomes a must. For example, a host device can be utilized for constantly accessing the portable memory device in order to perform the burn-in test. However, many types of errors occur randomly. In addition, as the error rates of these errors are typically not high, it usually takes a long time (e.g. up to several hundreds of hours) to perform the burn-in test, wasting time and labor costs. Therefore, a novel method is required for enhancing verification efficiency regarding the error handling mechanism mentioned above.